Design And Construction Of A Capacitor Evaluator
The design and construction of a capacitor evaluator involve a meticulous process of engineering and assembly aimed at assessing and optimizing the performance of capacitors. This intricate task demands a profound understanding of electrical components, circuitry, and measurement techniques. The capacitor evaluator serves as a crucial instrument in gauging the efficiency and reliability of capacitors, playing a pivotal role in various electronic applications. Engineers and technicians engage in a comprehensive exploration of capacitance, impedance, and voltage handling capabilities, weaving together intricate circuits to simulate real-world conditions. Precision and attention to detail are paramount throughout the design process to ensure the capacitor evaluator provides accurate and insightful data for enhancing the functionality and longevity of capacitors in diverse electrical systems.
Using this circuit and a known-value capacitor, you can find out the value of any capacitor. This circuit can be divided into capacitor evaluator and display sections. The capacitor evaluator circuit works off regulated 5V and 12V, while the display unit works off 5V. Connect 5V, point Y and ground of the capacitor evaluator section to the respective terminals of the display section.
TABLE OF CONTENTS
COVER PAGE
TITLE PAGE
APPROVAL PAGE
DEDICATION
ACKNOWELDGEMENT
ABSTRACT
CHAPTER ONE
1.0 INTRODUCTION
1.1 BACKGROUND OF THE PROJECT
- PURPOSE OF THE PROJECT
- AIM OF THE PROJECT
- OBJECTIVE OF THE PROJECT
- PURPOSE OF THE PROJECT
- LIMITATION OF THE PROJECT
- ADVANTAGES OF THE PROJECT
- PROBLEM OF THE PROJECT
- APPLICATION OF THE PROJECT
- RESEARCH QUESTION
- PROJECT ORGANISATION
CHAPTER TWO
LITERATURE REVIEW
- OVERVIEW OF THE STUDY
- REVIEW OF THE RELATED STUDY
CHAPTER THREE
3.0 CONSTRUCTION METHODOLOGY
3.1 BASIC OF THE SYSTEM
3.2 BLOCK DIAGRAM OF THE SYSTEM
3.3 SYSTEM OPERATION
3.4 CIRCUIT DIAGRAM
3.5 CIRCUIT DESCRIPTION
3.6 DESCRIPTION OF COMPONENTS USED
3.7 POWER SUPPLY UNIT
CHAPTER FOUR
4.0 TESTING AND RESULTS
- CONSTRUCTION PROCEDURE AND TESTING
- INSTALLATION OF THE COMPLET DESIGN
- ASSEMBLING OF SECTIONS
- TESTING OF SYSTEM OPERATION
- COST ANALYSIS
CHAPTER FIVE
- CONCLUSION
- RECOMMENDATION
- REFERENCES
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Capacitor Evaluator Circuit
Fig. 1: Capacitor evaluator circuit
As shown in Fig. 1, the capacitor evaluator comprises a linear ramp generator built around timer IC 555 (IC1). A linear ramp is generated when the resistor between the power supply and shorted pins 6 and 7 of the monostable circuit is replaced with a constant-current source formed by the circuit built around pnp transistor CK100 (T1). Push-to-on switch S1 is used to trigger ramp generator IC1.
The time period of linear ramp is given by:
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The output pulse duration at pin 3 of IC1 is counted by the circuit comprising the astable multivibrator built around timer 555 (IC2) followed by decade counter ICs 74LS90 (IC3 and IC4), which are 4-bit ripple decade counters. The outputs of IC3 and IC4 are connected to decoder/driver ICs 74LS47 (IC5 and IC6), respectively, which are further connected to 7-segment common-anode displays LTS542 (DIS1 and DIS2) for displaying the frequency of astable (IC2) used to evaluate the value of unknown capacitors.
Fig. 2: Display circuit
Circuit operation
If the counter counts up to ‘N1’ for known-value capacitor C1 and up to ‘N2’ for unknown capacitor C2, you can calculate the value of the unknown capacitor from the following relationship:
Insert known-value capacitor C1 (say, 47µF) into the ‘CUT’ socket shown in Fig. 1 and press S1 momentarily. The counter counts up to, say, ‘32’ (N1). Now remove the 47µF capacitor from the socket and insert the unknown-value capacitor (C2). The counter now counts up to, say, ‘16’ (N2).
Substituting the values of C1, N2 and N1 in Eq. (2) gives 23.5 µF as the value of the unknown capacitor.
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